pci.h

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#pragma once
 
#include "stdint.h"
 
typedef enum {
    pci_command_io_space = 0,
    pci_command_memory_space = 1,
    pci_command_bus_master = 2,
    pci_command_special_cycles = 3,
    pci_command_mw_ie = 4,
    pci_command_vga_palette_snoop = 5,
    pci_command_parity_error_response = 6,
    pci_command_serr_enable = 8,
    pci_command_fast_bb_enable = 9,
    pci_command_interrupt_disable = 10,
} pci_command_bit_t;
 
typedef enum {
    pci_status_interrupt_status = 3,
    pci_status_capabilities_list = 4,
    pci_status_66_MHz_capable = 5,
    pci_status_fast_bb_capable = 7,
    pci_status_master_data_parity_error = 8,
    pci_status_devsel_timing_low = 9,
    pci_status_devsel_timing_high = 10,
    pci_status_signalled_target_abort = 11,
    pci_status_received_target_abort = 12,
    pci_status_received_master_abort = 13,
    pci_status_signalled_system_error = 14,
    pci_status_detected_parity_error = 15,
} pci_status_bit_t;
 
 
#define PCI_VENDOR_ID 0x00
 
#define PCI_DEVICE_ID 0x02
 
#define PCI_COMMAND 0x04
 
#define PCI_STATUS 0x06
 
#define PCI_REVISION_ID 0x08
 
#define PCI_PROG_IF 0x09
 
#define PCI_SUBCLASS 0x0a
 
#define PCI_CLASS 0x0b
 
#define PCI_CACHE_LINE_SIZE 0x0c
 
#define PCI_LATENCY_TIMER 0x0d
 
#define PCI_HEADER_TYPE 0x0e
 
#define PCI_BIST 0x0f
 
#define PCI_CARDBUS_CIS 0x28
 
#define PCI_SUBSYSTEM_VENDOR_ID 0x2c
 
#define PCI_SUBSYSTEM_ID 0x2e
 
#define PCI_ROM_ADDRESS 0x30
 
#define PCI_CAPABILITY_LIST 0x34
 
#define PCI_INTERRUPT_LINE 0x3c
 
#define PCI_INTERRUPT_PIN 0x3d
 
#define PCI_MIN_GNT 0x3e
 
#define PCI_MAX_LAT 0x3f
 
 
 
#define PCI_BASE_ADDRESS_0 0x10 
#define PCI_BASE_ADDRESS_1 0x14 
#define PCI_BASE_ADDRESS_2 0x18 
#define PCI_BASE_ADDRESS_3 0x1c 
#define PCI_BASE_ADDRESS_4 0x20 
#define PCI_BASE_ADDRESS_5 0x24 
 
 
#define PCI_PRIMARY_BUS   0x18 
#define PCI_SECONDARY_BUS 0x19 
 
#define PCI_HEADER_TYPE_NORMAL  0 
#define PCI_HEADER_TYPE_BRIDGE  1 
#define PCI_HEADER_TYPE_CARDBUS 2 
 
#define PCI_TYPE_BRIDGE 0x060400 
#define PCI_TYPE_SATA   0x010600 
 
#define PCI_ADDRESS_PORT 0xCF8  
#define PCI_VALUE_PORT   0xCFC  
#define PCI_NONE         0xFFFF 
 
typedef void (*pci_scan_func_t)(uint32_t device, uint16_t vendor_id, uint16_t device_id, void *extra);
 
void pci_write_8(uint32_t device, uint32_t field, uint8_t value);
 
void pci_write_16(uint32_t device, uint32_t field, uint16_t value);
 
void pci_write_32(uint32_t device, uint32_t field, uint32_t value);
 
uint8_t pci_read_8(uint32_t device, int field);
 
uint16_t pci_read_16(uint32_t device, int field);
 
uint32_t pci_read_32(uint32_t device, int field);
 
void pci_scan(pci_scan_func_t f, int type, void *extra);
 
void pci_remap(void);
 
int pci_get_interrupt(uint32_t device);
 
void pci_dump_device_data(uint32_t device, uint16_t vendorid, uint16_t deviceid);
 
void pci_debug_scan(void);